AMD Opteron memory bandwidth (was Re: CPUs for a Beowulf)

[Mark Hahn]

> > If you could connect those HyperTransport channels into a scalable mesh
> > then this sounds a lot like the good old Cray T3E design.  Drool...  It's
> > too bad that Red Storm won't be taking that route.  The T3E was so nice.
> 
> The article I quoted from Digit Life floats the idea that AMD may be able 
> to make for Cray an Opteron with 4 Hypertransports, making a 3D mesh 
> possible. Is this just supposition?

it would be astonishing if AMD hadn't prototyped this already.

one sticking point is that the current architecture is based on broadcast 
for managing coherence.  a big-scalable approach would need to be
directory-based, perhaps assisted by the OS.  I dimly recall that the 
current packet format has just three bits for node ID.  I have an even
more dim recollection that current HT is limited to 20cm; perhaps that 
would be enough for a non-torus mesh.

but, as Dell points out, the market for such things is rather small.

regards, mark hahn.

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