[Beowulf] Max flops to watts hardware for a cluster

Andrew M.A. Cater amacater at galactic.demon.co.uk
Mon Feb 16 18:11:50 EST 2004

On Mon, Feb 16, 2004 at 01:00:34PM -0800, Jim Lux wrote:
> This is an exceedingly sophisticated question..
> Do you count:
> Wall plug watts to flops? or CPU watts to flops?
Via Eden / Nehemiah chips at 1GHz for 7W or Acorn ARM e.g. Simtec 
evaluation boards ?

> does the interconnect count?  (just the power in the line drivers and
> terminations is a big power consumer for spaceflight hardware... why LVDS is
> overtaking RS-422 ... 300mV into 100 ohms is a lot better than 12-15V into
> 100 ohms. Too bad LVDS parts don't have the common mode voltage tolerance.
Cheap slow ASICs and serial port type speeds? Low power Bluetooth 

> I'll bet that gigabit backplane in the switch burns a fair amount of
> power...
> does the memory count?  This would drive more vs less cache decisions, which
> affect algorithm partitioning and data locality of reference.
The early Seymour Cray model - minimum numbers of standard parts that 
are ultra fast?

> Is there a constraint on a "total minimum speed" or "maximum number of
> nodes"?  The interesting tradeoff in speed of nodes vs number of nodes
> manifests itself in many ways: more interconnects, bigger switches, etc.

Buckyball of PDA's anyone ? :)

> More nodes means Larger physical size means longer cables means more cable
> capacitance to charge and discharge on each bit means more power in the line
> drivers.

Xilinx FPGA type architecture? Inmos transputer-style? Node on chip? AVR 
Atmel-type chips?

> What's your message latency requirement?  Can you do store and forward
> through the nodes (a'la iPSC/1 hypercubes) (saving you the switch, but
> adding some power in the CPU to shuffle messages around)
> Can free space optical interconnects be used?  (power hungry Tx and Rx, but
> no cable length issues)

ThinkGeek do an _ultra cool_ looking green pumped laser pointer which 
will reach low cloudbases :)

> Anyway.. this is an issue that is very near and dear to my heart (since I'm
> designing power constrained systems).  One problem you'll find is that
> reliable and comparable (across processors/architectures) numbers are very
> hard to come by.  I've spent a fair amount of time explaining why 40 MFLOPs
> in a 20 MHz DSP can actually be a lot more "crunch" at a lot less power than
> a 200 MIPS PowerPC 750 running at 133 MHz.
If 5W of power goes to/from Mars - then the JPL are the ones to beat on 
this [makes QRP radio hams look positively profligate] :)

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