SMP CPUs scaling factors (was "what is a flop")

[Franz Marini]

Hi,

On Tue, 17 Jun 2003, Maurice Hilarius wrote:

> And I would say dual CPU boards do not sale at a factor of 2:1 over singles.
> ...
> As a general ( really general as it changes a lot with code and 
compilers) 
> the rule I know :
> 
> Dual P3 ( VIA chipset): 1.5 : 1
> Dual XEON P4 ( Intel 7501 chipset): 1.3 : 1

Hrm. Now, this is a figure I find hard to believe... This would mean that, 
for a "general" (and thus I think you mean "not-overly-optimized") 
parallel (threaded, I guess) code, you'd get only a 30% gain in a dual 
Xeon system over a single one...

Don't know, it seems a somewhat conservative figure to me.

> Dual AthlonMP ( AMD 760MPX chipset) 1.4 : 1

(The same considerations applied to the Xeon holds true here ;))


Does anyone have some real world application figures regarding the 
performance ratio between single and two-way (and maybe four-way) SMP 
systems based on the P4 Xeon processor ? I'm particularly interested in 
molecular dynamics code, like, e.g., Gromacs and CPMD. 

Have a nice day,

Franz

---------------------------------------------------------
Franz Marini
Sys Admin and Software Analyst,
Dept. of Physics, University of Milan, Italy.
email : franz.marini at mi.infn.it
--------------------------------------------------------- 


_______________________________________________
Beowulf mailing list, Beowulf at beowulf.org
To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf