dual Xeon issue

Josip Loncaric josip at lanl.gov
Thu Jun 5 16:12:32 EDT 2003

sfrolov at accufo.vwh.net wrote:
> [...]  We've benchmarked clasters offered by Microway and
> Aspen Systems and discovered that we are getting much better results
> using only one CPU per box (running the model on 6 boxes using one
> CPU in each box was about 50% faster than running it on 3 boxes using
> both CPUs).

Your results are only slightly worse than expected.  This is a generic 
situation with memory bandwidth limited codes, where a dual CPU box 
typically counts as only 1.5 single CPU boxes (approximately) due to 
shared resources (memory bandwidth, network card, certain OS functions). 
  However, for a code which spins mostly in cache and whose processes to 
not communicate much, a dual CPU box can match two singles.

Shared memory communication is much faster than network, and it can be a 
big win if used between tightly coupled processes within a dual CPU box, 
but there is a caveat.  Polling two different MPI devices (shmem and 
net) can impose its own penalty.  Moreover, since most problems do not 
partition neatly into loosely coupled pairs of tightly coupled 
processes, exploiting the higher bandwidth of shared memory 
communication is tricky.

For all these reasons, some people prefer singles.  Others like denser 
packaging so they buy duals.  When a high end network is involved 
(Myriniet, Quadrics), duals are clearly more cost effective since they 
require fewer network ports for the same number of CPUs.


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