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<P><BR>From: "Bill Broadley" <A href="mailto:bill@cse.ucdavis.edu">bill@cse.ucdavis.edu</A><BR><BR>>If gallium arsenide or some other material gave us 10x the clock rate per<BR>>watt, but 1/2 the transistors would it really matter? Seemed like even intel<BR>>is begrudgingly admitting it's the memory bus, and finally the nehalem is<BR>>blessed with dramatically more bandwidth.<BR>><BR>>Seems like increasingly cores are turning latency limited workloads (for the<BR>>parallel jobs of course) into bandwidth limited ones. Without a memory bus<BR>>that allows for 10x the bandwidth it doesn't really seem like 10x the clock<BR>>rate would be of particular use.</P>
<P> </P>
<P>Right. Excepting the potential for improving the performance of serial codes</P>
<P>or pieces of serial code (and perhaps badly written code), delivering 10x by</P>
<P>clock or by core would not seem to change the bandwidth problem both create.</P>
<P>Manycore core promises even greater multiples. For bandwidth limited data</P>
<P>parallel codes, you might as well stay on the path of lowest economic resistance.</P>
<P> </P>
<P>rbw<BR><BR>_______________________________________________<BR>Beowulf mailing list, Beowulf@beowulf.org<BR>To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf<BR></P></div><br />--
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