I imagine a hybrid topology of certain sized subclusters connected
internally with a right topology for their size, and the subclusters
connected to each other with some other topology, etc. The way cores on
a chip are connected is different obviously from the way chips on a
board, or boards on a backplane, or boxes to routers, or routers to
metarouters...and I need hybrid-ness so that the
optimization/self-reconfiguring algorithm can do something with its
platform.<br>
<br>
So maybe just some scale component or subcluster would be hypercube,
some FNN, some tree, I don't know. I want enough wires with enough
nodes so that my application can tell **me** what topology works best
for a compuational category of applications.<br>
<br>
Peter<br><br><div><span class="gmail_quote">On 7/25/08, <b class="gmail_sendername">Lawrence Stewart</b> <<a href="mailto:larry.stewart@sicortex.com">larry.stewart@sicortex.com</a>> wrote:</span><blockquote class="gmail_quote" style="border-left: 1px solid rgb(204, 204, 204); margin: 0pt 0pt 0pt 0.8ex; padding-left: 1ex;">
Mark Hahn wrote:<br> >> It is my sacred duty to rescue hypercube topology. Cool Preceeds<br> >> Coolant :-)<br> ><br> > I agree HC's are cool, but I think they fit only a narrow ecosystem:<br> > where you don't mind lots of potentially long wires, since higher<br>
> dimensional<br> > fabrics are kind of messy in our low-dimensional universe. also, HC's<br> > assume intelligent routing on the vertices, so you've got to make the<br> > routing overhead low relative to the physical hop latency.<br>
><br> > it does seem like there is some convergence to using rings onchip,<br> > fully connected graphs within a node and fat trees inter-node.<br> > one unifying factor is that these are all point-to-point topologies...<br>
<br>Hypercubes give log diameter, which is good, but when you grow the machine<br> you have to add more ports to each node, which is not so good once you run<br> out of pins.<br> <br> Other topologies, such as Kautz and deBruijn graphs, give log diameter<br>
as well,<br> but with a fixed number of ports per node, so you can put the node on<br> one chip<br> and still build systems of greater or lesser size without having to respin.<br> <br> You can route arbitrary size Kautz graphs on a<br>
fixed number of layers, so when these somewhat wacky topologies<br> go on chip you can still route it on N metal layers.<br> <br> The point about long wires is well taken, but I think it is the price of<br> low diameter.<br>
<br><br> --<br> -Larry / Sector IX<br> <br> </blockquote></div><br>