[Beowulf] Tilera targets Intel, AMD with 100-core processor

Mark Hahn hahn at mcmaster.ca
Mon Oct 26 12:32:04 EDT 2009


> So unless your application sits in the on-core cache, I am wondering where 
> the real benefit
> is going to be (ignoring the fact that the processor is still PCI-e

"serve Web data" seems to be the target, as mentioned in the release.
that seems pretty fair, since webservers tend to have pretty small
footprints, and more specialized protocols can be quite compact as well.
the WIMP paper (CMU, recent) makes a pretty nice argument for web services
based on lots of p2p-organized low-power processors with content in dram
and/or flash.  that paper was based on (IIRC) geode-level embedded cpus;
the tilera thing would probably compare quite well agains them.

someone _has_ to write a webserver for Cuda/OpenCL soon! 
not because it makes sense, of course, but think of the bumper sticker:
 	my webserver has 1600 cores.
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