[Beowulf] [hpc-announce] IEEE Computer: Special Issue on "Tools and Environments for Multi- and Many-Core Architectures"

Wuchun Feng feng at cs.vt.edu
Wed Mar 11 13:06:09 EDT 2009


An amended CFP ... this time, with web links to the submission  
guidelines and instructions.

Regards, Wu

----

IEEE Computer
Special Issue on Tools and Environments for Multi- and Many-Core
Architectures
DEADLINE EXTENDED to March 31, 2009

For submission instructions, please visit http://www.computer.org/portal/pages/computer/content/author.html

To submit, go to https://mc.manuscriptcentral.com/cs-ieee.

In the past, computing speeds doubled every 18-24 months by increasing
the clock speed, thus giving software a "free ride" to better
performance whenever the clock speed increased.  This free ride is now
over, and such automatic performance improvement is no longer possible.
With clock speeds stalling out and computational horsepower instead
increasing due to the rapid doubling of the number of cores per
processor, serial computing is now dead, and the vision for parallel
computing, which started over forty years ago, is a revolution that is
now upon us.

With the advent of multi-core chips --- from the traditional AMD and
Intel multi-core to the more exotic hybrid multi-core of IBM Cell and
many-core of AMD/ATi and nVidia GPGPUs --- parallel computing across
multiple cores on a single chip has become a necessity.  However,
writing parallel applications is a significant undertaking that will
create more, not less, problematic software.

In order for parallelism to succeed, it must ultimately produce better
performance relative to speed and efficiency.  However, not only are
most programmers ill-equipped to produce proper parallel programs, but
they also lack the tools and environments for producing such programs.
Therefore, the purpose of this special issue is to present the latest
advances in next-generation tools and environments for multi- and many-
core architectures.  We solicit contributions in areas including, but
not limited to:

- Programming models and environments for multi-core and many-core
architectures

- Systems scheduling and management between different subsystems of
multi-core and many-core architectures

- Compile-time and run-time optimizations in multi-core and many-core
architectures

- Tools to enhance programming productivity in multi-core and many-
core architectures

- Performance evaluation of applications and system software in multi-
core and many-core architectures

- Software productivity studies

- Fault tolerance and virtualization

- Monitoring and measurement tools to better enable debugging and
performance optimization

--
Prof. Wu FENG | Synergy Laboratory | Depts. of CS and ECE |
2202 Kraft Dr | Virginia Tech | Blacksburg, VA 24060-6356 |
540-231-1192 | feng at cs.vt.edu | http://www.cs.vt.edu/~feng

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