[Beowulf] Intel shows 48-core 'datacentre on a chip'
hahn at mcmaster.ca
Wed Dec 2 19:02:13 EST 2009
> SCC combines 24 dual-core processing elements, each with its own router, four
> DDR3 memory controllers capable of handling up to 8GB apiece, and a very fast
sounds a fair amount like larrabee to me.
> you needed your own datacentre. Now, you just need your own chip," said
that has to be one of the most asinine things I've heard recently.
> The on-chip network is configured as a 6x4 node, two-dimensional mesh. It has
hmm, larrabee rumors indicate a dual-ring bus, not 2d mesh ala tilera.
non-coherent cores sharing a small number of dram interfaces also sounds
like an interesting trick. it implies that at some level, there's a table
controlling which cores see which chunks of memory...
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