[Beowulf] nearly future of Larrabee
bcostescu at gmail.com
Sat Aug 22 21:17:08 EDT 2009
2009/8/21 Mikhail Kuzminsky <kus at free.net>:
> Recently I didn't see any words about Larrabee-based servers - only about
> graphical cards.
I have attended a talk by someone from Intel, but not someone working
on Larrabee, so the information might not be current or accurate. He
mentioned that the initial launch will only be with graphics cards.
Intel sees Larrabee as an addition to the system and not as the main
component of the system, so it's unlikely to have it as the main CPU;
it's still possible to have it in some other form than a graphics card
> Q1. Is there the plans to build Larrabee-based motherboards (in particular
> in 2010) ?
>From what I have seen, it's unclear what a hypothetical Larrabee
motherboard should contain. The schematics that I've seen mentioned
the ways the cores connect to the shared cache, but only mentioned a
(shared) memory controller, no I/O controller.
> If Larrabee will be in the form of graphical card (the most probable case) -
> Q2. What will be the interface - one slot PCI-E v.2 x16 ?
In the presentation that I've seen, it was not clearly specified, but
implied, as this is the current way of interfacing with a graphics
> Q3. Does it means that Larrabee will give essential speedup also on relative
> short vectors ?
I don't quite understand your question...
> And is there some preliminary articles w/estimation of Larrabee DP
> performance ?
This question was asked, the answer was that there are no figures yet
as the only official way to play with a Larrabee core now is through a
simulator which makes performance figures irrelevant.
> Q4. Is there some rumours about direct Larrabee support w/Intel ifort or PGI
> compilers in 2010 ?
The core is mainly a P5 with added vector instructions, so most of the
code generation should be done already for several years by Intel, PGI
and other compilers, even gcc. Only the new vector instructions need
to be added and the compiler be taught to do vectorization using them;
this might not be as easy as it sounds because the new instructions
don't only deal with a larger set of bits but also with f.e.
scatter/gather/masking array elements.
One other detail that was mentioned was a difference with respect with
current nVidia & AMD GPUs: these are good at doing the same thing to
lots of data in parallel (SIMD), while the Larrabee cores will also be
good at doing sequences of operations - workflows - where core 1
always does the same operation on data from memory, core 2 always does
the same operation, different from core 1, to data coming from core 1,
etc. I haven't kept up to date with compiler technology, so I don't
know how fit are current compilers to detect these workflows and
generate such code.
> Q5. How much may costs Larrabee-based hardware in 2010 ? I hope it'll be
> lower $10000. Any more exact predictions ?
The launch as graphics cards suggests to me that they will compete in
price with similar offerings from nVidia and AMD.
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