[Beowulf] Teraflop chip hints at the future

Paul Jackson pj at sgi.com
Tue Feb 13 00:11:41 EST 2007


The most useful article I've found on Intel's teraflop chip is
on Anandtech:

    The Era of Tera: Intel Reveals more about 80-core CPU
    http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2925&p=1

That article says:

    Although the chip itself is capable of processing over one trillion
    floating point operations per second, don't be fooled by the numbers;
    these aren't 128-bit FP operations but rather single-precision FP
    operations. Each tile features two fully pipelined 32-bit floating
    point multiple-accumulator (FPMAC) units. There are no other execution
    units on each tile, so all arithmetic operations must be carried out
    through these FPMACs. 

-- 
                  I won't rest till it's the best ...
                  Programmer, Linux Scalability
                  Paul Jackson <pj at sgi.com> 1.925.600.0401
_______________________________________________
Beowulf mailing list, Beowulf at beowulf.org
To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf

!DSPAM:45d1c0a2128547095717635!



More information about the Beowulf mailing list