[Beowulf] Register article on Opteron - disagree

Joe Landman landman at scalableinformatics.com
Tue Nov 23 14:52:17 EST 2004


My bad... I jargoned, assuming that HT == HyperTransport.  I don't hear 
much talk about HT := hyperthreading anymore ...

Looking over the Nocona specs, I think the interesting processor will be 
coming after it (due to north/south bridge issues).  I could be wrong 
about the performance/scalability of the chip.

Building bigger shared pipes runs you into contention and sharing limits 
quickly (especially if the pipeline consumers can sink/source the entire 
pipe throughput themselves).  More (possibly slower) pipes reduces the 
direct contention, though you have to deal with other issues (NUMA, 
scheduling, etc).



Sean Dilda wrote:

>On Mon, 2004-11-22 at 19:06, Greg Lindahl wrote:
>  
>
>>On Mon, Nov 22, 2004 at 10:17:55AM -0500, Sean Dilda wrote:
>>    
>>
>>>On Mon, 2004-11-22 at 00:57, Joe Landman wrote:
>>>      
>>>
>>>> If a Nocona follow-on follows the design of the Opteron (IOMMU 
>>>>and HT, among other things), then things could get quite interesting.
>>>>
>>>>        
>>>>
>>>I can't imagine why Intel would drop a feature (HT) to match Opteron. 
>>>      
>>>
>>AMD has Hyper Transport, Intel has Hyper Threading. The first gets you
>>better memory and I/O bandwidth, the second is the thing you turn off
>>in the BIOS to keep it from screwing up your MPI runs.
>>    
>>
>
>Thanks.  That was just a bad case of acronym-collision on my part. 
>Sorry for the mistake.
>
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>  
>

joe

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