[Beowulf] Virginia Tech upgrade

Don Holmgren djholm at fnal.gov
Wed Jan 28 13:16:26 EST 2004


With gcc 2.95.3, -O3, I get on a dual 2.0 GHz G5:


Total memory required = 183.1 MB, walltime clock
-------------------------------------------------------------
Function      Rate (MB/s)   RMS time     Min time     Max time
Copy:        2848.7459       0.0450       0.0449       0.0457
Scale:       2851.4134       0.0453       0.0449       0.0457
Add:         3470.4630       0.0556       0.0553       0.0557
Triad:       3456.0981       0.0557       0.0556       0.0561

and with the beta IBM compiler (VAC 6.0, -O5):

-------------------------------------------------------------
Function      Rate (MB/s)   RMS time     Min time     Max time
Copy:        2923.5762       0.0439       0.0438       0.0441
Scale:       2566.9303       0.0500       0.0499       0.0502
Add:         2304.2857       0.0834       0.0833       0.0836
Triad:       2339.1539       0.0822       0.0821       0.0823


The data bus is a bit unconventional, in that it's split - 32 bits
read-only, 32 bits write-only.  The two halves can run at the same time.

For moving data, that configuration is nicely balanced.  For
computations, it may not be so well balanced.  For example, most of the
flops in one of our codes occur doing small complex matrix-vector
multiplies.  One typical kernel reads 96 single precision operands, and
writes only 6 single precision results.  The effective memory bandwidth
for this is much reduced - instead of a 1 GHz FSB, it's more like an
effective 500 MHz FSB.

Don Holmgren
Fermilab


On Tue, 27 Jan 2004, Mark Hahn wrote:

> I draw several conclusions from the VT cluster:
>
> 	- HPL is very cache-friendly.  the dual-G5 has an impressive peak
> 	flops rating, but pretty mediocre memory bandwidth.  anyone have a
> 	Stream result for a G5?  I'd guess around 2.5 GB/s.
>
<snip>
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