Enterprise Beowulf and Beowulf on a Chip

phil.neumiller at convergys.com phil.neumiller at convergys.com
Tue Jun 17 16:23:56 EDT 2003


In my own search for finding out whether Beowulf makes sense for
enterprise computing (specifically on-line transaction processing
(OLTP)), I found a paper at Compaq research:

http://research.compaq.com/wrl/projects/Database/

specifically the paper

http://research.compaq.com/wrl/projects/Database/isca00.pdf

This work emphasizes "large memory stall times" as being
a primary culprit limiting OLTP performance.  The solution
promoted by Compaq researchers in the paper is chip
multiprocessing (CMP).  This makes me wonder if OLTP
can benefit from simply lots of processors (with fast interconnect)
to utilize more L1, L2 cache simultaneously (a might bit larger
than a chip I might add!!)...

Their Piranha system (a research prototype) integrates eight
Alpha processor cores on a chip with a two level cache with
cache coherence architecture (sort of a micro-sub-cluster).

 If this approach makes sense for OLTP doesn't a Beowulf
make sense for OLTP work now?

Also...

If Beowulf makes sense on the macro level does it make
sense in the micro-level or perhaps in the fractal sense of
a self similar architecture (exploiting even more hierarchy)?


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