back to the issue of cooling

Robert G. Brown rgb at phy.duke.edu
Tue Apr 22 17:08:49 EDT 2003


On Tue, 22 Apr 2003, jbassett wrote:

> Yes , yes I haven't forgotten that yellow stat phys book that I enjoyed a 
> couple of semesters ago. It depresses me that there is not an easy solution. I 
> suppose it is better to make the engine more efficient than to try to trap 
> unburned fuel. Cluster o' Transmeta.

No, not even this does it in the HPC market where there are few idle
cycles, unless my back-of-the-envelope computations are wrong (entirely
possible as I suck at arithmetic:-).  IIRC there is an energy cost per
switching operation in VLSI that provides a basic, physical limitation
on the energy efficiency per "flop".  Beyond that, it is the battle of
the chip maskers.  How to lay out the chip at a given fabrication scale
so that the switching operations are reliable, so that pathways are
minimized, so that energy isn't radiated away.  If you work out the
actual energy cost per average "instruction" for the different silicon
foundries, you don't get all that profound a difference between them --
well within a factor of two in most cases.

So you can get more slower, cooler chips, or fewer faster, hotter chips,
but the net amount of energy you consume doing a GFLOPS-year of mixed
computation isn't likely to vary tremendously, from at least the seat of
the pants computations I've done.  Don't forget the auxiliary costs, as
well -- one case, motherboard, memory, disk for a dual 2.5 GHz CPU (5
aggregate GHz of instructions) vs five cases for single 1 GHz CPUs means
that even if the 1 GHz CPU runs more than 2.5x cooler (often it won't)
you may be spending an extra 200 Watts running the extra cases and
peripherals.  You might save 20% or 30% of your energy costs PER UNIT OF
WORK ACCOMPLISHED shopping for energy-efficient processors, but I would
be surprised if you did much better than that.

So -- tanstaafl.  Barring real technical breakthroughs at the silicon
level -- teensy switches that switch, reliably, just as fast, at lower
voltage with lower energy, the best you are dealing with is
rearrangements of the same scaling laws at each level of VLSI masking.
Not that there aren't real differences that appear over time -- my palm
pilot is about as fast as my original IBM PC was, but runs MUCH
cooler:-) but there is a pretty significant lag in performance to where
cpu masking rearrangements and implementation in different technologies
starts making them happen.  Believe me, if it were possible to run
silicon cooler (and over time it is), chip designers would "immediately"
implement the cooler technology to increase switch densities and make
more powerful chips, since heat dissipation is a major limitation on
chip design as it is.

  rgb

Robert G. Brown	                       http://www.phy.duke.edu/~rgb/
Duke University Dept. of Physics, Box 90305
Durham, N.C. 27708-0305
Phone: 1-919-660-2567  Fax: 919-660-2525     email:rgb at phy.duke.edu



_______________________________________________
Beowulf mailing list, Beowulf at beowulf.org
To change your subscription (digest mode or unsubscribe) visit http://www.beowulf.org/mailman/listinfo/beowulf



More information about the Beowulf mailing list