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The Need for Speed Can be Cool Indeed PDF Print E-mail
Written by Douglas Eadline   
Wednesday, 15 March 2006
This week we highlight some talks between AMD and ClearSpeed, a notable cluster achievement that has nothing to do with the Top500, some new "cool" processors, and new kernel additions that might be of interest to cluster mavens like yourself. And in true journalistic fashion, now that I have baited you with intrigue and mystery, you immediately click the headline to get the whole story. Right?

AMD is talking to ClearSpeed about producing a co-processor. Seems the IBM Cell has people thinking about things. AMD, Sun, and ClearSpeed are also working together on what will reportedly be Japan's fastest computer(pdf).

In the what do people actually do with this stuff department, The Theoretical and Computational Biophysics Group at the Beckman Institute of the University of Illinois at Urbana-Champaign (UIUC) has used NAMD and VMD (Visual Molecular Dynamics) has modeled and visualized a virus in a small drop of salt water, altogether involving over a million atoms. This level of simulation has never been done before. Way to go geeks!

Moving on to the cluster tinker toys department, VIA, known for its low power CPUs, has introduced new motherboards and processors based on their cool running C7 design. The little buggers (mini-ITX, 6.7"x6.7" or 170mm x 170mm) will include a C7 processor(s) clocked at 1.5GHz, support 533/400MHz DDR2 RAM, gigabit Ethernet, onboard SATA II RAID 0, 1, and O+1, support SSE2 and SSE3, and a full-speed FPU (floating point unit), rather than the half-speed unit of earlier Via chips. And, for you Monte Carlo fans, the VIA processors have two hardware Random Number Generators (RNG) that are reported "to create unpredictable random numbers" at a rate of 1600K to 20M per second. Of course, if they were predictable ... Now what I'm really want is an omega generator.

Finally, we have the release of kernel 2.6.16. Some interesting additions include Oracle Clustered File System (OCFS2), Transparent Inter Process Communication (TPIC), and support for the IBM Cell. A comprehensible changelog is also available for those of us who want to better understand how the "SLOB allocator" was implemented.

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Last Updated ( Tuesday, 13 June 2006 )
 
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